Homework # 19  Due Monday, November 27 prior to the start of  YOUR class


Perform the write-access timing analysis when a MC 68HC11 clocked at 2.0 MHz 
is interfaced to a Hitachi HM6264A-12 (using the circuit shown in Figure 5.17,
page 225 of your text)

Use the assumptions stated in class on 11/22. Namely:



	The 74F373 is a LATCH, not a flip flop.  
	20ns is a MAX rise/fall time, it can be less
	74LS00 and 74LS00 have a 15ns propagation delay (at room
		temp), both rising and falling output
	74F138 decoder has a delay of 8 ns
	The 74F373 LATCH has a latch delay of 11.5 ns


What I am looking for is a chart similar to table 5.9 (on page 230
of your text) AND the work you did to calculate these values.  Note that 
your author gives a very detailed explanation of a similar analysis on 
pages 224-233 of your textbook.  You cannot merely copy his values, since
he treats the rise/fall times as absolutes and treats the '373 as
a flip-flop rather than a latch.  Many of your numbers will be the same as
his, but some will be different.