Announcement

Some thoughts on the Final Exam

There will be an optional review session, in CEH 351, at 3:00 pm on Sunday, May 2.

Instructor	Dr. Robert S. Fourney
Email	Robert_Fourney@sdstate.edu
Phone	688-4016
Office	215 Harding Hall
Class Time	TTh 12:00-12:50
Class Location	CEH 351
Office hours	Monday 2-4 pm Wednesday 10-11 am Friday 9-11 am
Text	Electrical Engineering, Principles and Applications, 2nd Edition by Allan R. Hambley, published by Prentice Hall The text may also be supplemented with additional reference materials which will be linked from this page and/or handed out in class as they are assigned.

Prerequisites

EE 300 and EE 301

Corequisites

EE 303 -- Basic EE II Lab

Course Description

This course serves as an the second part of the introduction to electrical engineering for students who are not electrical engineering majors

Course Work

Unless otherwise specified, all work that you submit in this course must be your own; unauthorized collaboration is considered academic dishonesty. Please save us both a lot of trouble by realizing that I will pursue any such transgressions to the fullest extent possible. As a rule, late assigments are not generally accepted (e.g., attempting to hand in an assigment after the start of class on the due date will result in a grade of 0 for that assignment). Late assignments will only be accepted under exceptional circumstances AND with prior arrangement. A penalty may apply.

Grading Policy

Final grades will be determined via the following breakdown:

 

Exam #1	25%
Exam #2	25%
Homework and Quizzes	20%
Class Participation	5%
Comprehensive Final Exam	25%

Your class participation grade will be determined by your on time attendance to class as well as your participation in classroom discussions. Pop quizzes, when given, will cover material previously covered in class, previous homework assignments, and/or simple questions on the current days reading assignment.   Please read Making the Grade by Kurt Wiesenfeld and keep his views (which I share) in mind when deciding how much effort to invest in your coursework.

Schedule of Upcoming Classes

No. Date Topic, Reading, and Assignment 1 Jan 8 Introduction and Motivation Syllabus and rules handed out in class. Portions of the first assignment are due January 12 and the remainder is due before class on January 13 2 Jan 13 Basic Diode Concepts, load-line analysis, and zener diodes Read Chapter 10, sections 10.1-10.3 Homework # 1 assigned, due on Tuesday, January 20. 3 Jan 15 Zener diode examples, ideal diode model, rectifier and wave-shaping circuits Read sections 10.3-10.4, skim 10.5, read 10.6-10.7 4 Jan 20 Half and Full wave rectifiers, clipping circuits Sections 10.6-10.7 (only through Exercise 10.15 on page 446) Homework # 2 assigned, due on Tuesday, January 27. Homework # 1 due before class 5 Jan 22 Fourier Analysis and Transfer Functions Section 6.1 6 Jan 27 Filtering Basics Sections 6.2 and 6.5 Homework # 3 assigned, due on Tuesday, February 3. Homework # 2 due before class 7 Jan 29 Details and examples of first order filters Sections 6.2 and 6.5 8 Feb 3 Amplifier basics Chapter 11: Sections 11.1, 11.6 to the extent discussed in class, 11.7, and 11.11 Homework # 4 assigned, 9 Feb 5 Operational Amplifiers -- circuit analysis Chapter 14 through 14.4 Homework # 3 due before class extended from Tueday due to Phonathon Homework 4 is still due on Tuesday, Feb 10 10 Feb 10 Op Amps - circuit design and examples Sections 14.5, 14.10 Some, but maybe not all, of today's topics will be on the exam. The exact cut-off point will be discussed in class Homework # 4 is due before class . Feb 10 Optional help session at 7:00 pm in CEH 351. Bring questions, this is not a lecture. 11 Feb 12 First Exam 12 Feb 17 Go over exam, discuss differentiator and integrator Op-Amp circuits Section 14.10 Homework 5 assigned, due before class on Tuesday, February 24. 13 Feb 19 Intro to transistors, current-voltage relationships, BJT common-emitter characteristics. Sections 13.1-13.2 Read Section 13.3, and example 13.2 (starting on the bottom of page 567) prior to class on Tuesday 14 Feb 24 Load line analysis of Common Emitter BJT amplifier and Large-Signal (DC) Models Section 13.3 and 13.5 (note: skipped 13.4, pnp transistors) Homework # 6 assigned, due on Tuesday, March 2. Homework # 5 due before class 15 Feb 26 Large-Signal (DC) Analysis and Bias circuit design Section 13.6 16 Mar 2 Small signal circuit model, Common Emitter amplifier Section 13.8 Homework # 6 Due before class Homework # 7 assigned, due on Tuesday, March 16. 17 Mar 4 Continue with small signal circuit model, emitter follower circuit, and a very brief discussion of PNP transistors. Section 13.9 and 13.4 . Mar 9 No Class -- Spring Break . Mar 11 No Class -- Spring Break 18 Mar 16 Discuss Homework, brief intro to PNP BJTs, N and P Channel MOSFETs Homework # 7 Due before class Homework # 8 assigned Due March 23rd 19 Mar 18 Intro to Digital Systems, various number systems Section 7.1-7.2 You may skip references to octal and BCD (including on the homework) 20 Mar 23 Representing negative numbers (signed magnitued, 1's complement, 2's complement), addition, subtraction, and overflow Section 7.2 Homework #8 due 21 Mar 25 Combinatorial Logic Circuits Section 7.3 . Mar 28 Optional review sessin 6:00 pm in 351 Crothers. Please bring questions, this is not a lecture. 22 Mar 30 Second exam 23 Apr 1 Review logic gates, truth tables. Introduce bi-stable elements SR latch, clocked SR latch, edge triggered D (for Data flip-flop Chapter 7, skip section 7.5 and discussion of P.O.S. implementations Homework 9 assigned Due April 6 24 Apr 6 Went over 2nd exam. Warned to expect problem on final and quizzes testing your understanding of the concept in problem 4. Homework 10 assigned, Due on Tuesday, April 13 Homework 9 Due 25 Apr 8 Finish Chapter 7. Edge triggered D (Data) flip-flops, JK flip-flops, counters. 26 Apr 13 More discussion on latches and flip-flops. Discuss handout--detailed example of edge-triggered master-slave D flip flop. JK Flip Flops, shift registers. 27 Apr 15 Chapter 8 through section 8.3 -- Microcontroller basics, memory types. (The rest of chapter 8 will be skipped). More Ripple Counter examples, using asynchronous presets and clears to limit range. 28 Apr 20 Finish Chapter 8, briefly discuss incoming homework, Begin chapter 9 29 Apr 22 Finish Chapter 9, through section 9.3 -- Measurement Concepts and Sensors, Signal conditioning, ground loops, analog-to-digital conversion. Homework 11 assigned, due Tuesday 4/27 30 Apr 27 Begin Rotating Machinery (portions of Chapters 16 and 17) 31 Apr 29 Rotating Machinery (portions of Chapters 16 and 17) May 2 Optional Review session @ 3 pm in Crothers 351. Please bring questions . May 3 Final exam -- 4 pm -- Crothers 351 (Monday, May 3)