Homework # 19  Due Monday, May 1 prior to the start of class

Perform both the read-access timing analysis and the write-access timing
analysis when a MC 68HC11 clocked at 3.0 MHz is interfaced to a Hitachi
HM6264A-10 (using the circuit shown in Figure 5.17, page 225 of your text)
Use the assumptions stated in class on 2/28. Namely:



	The 74F373 is a LATCH, not a flip flop.  
	20ns is a MAX rise/fall time, it can be less
	74LS00 and 74LS00 have a 15ns propagation delay (at room
		temp), both rising and falling output
	74F138 decoder has a delay of 8 ns
	The 74F373 LATCH has a latch delay of 11.5 ns


This is basically a "do over" of homeworks 17 and 18.  Don't 
just substitute the new parameter values into my solution.  
Make sure that you really understand, and can do this on your own.  
You will have a chance to show this on the exam.